1. Field of Invention
The present invention generally relates to a computer chipset, and more particularly to a chipset for accessing a read only memory (ROM).
2. Description of Related Art
Computers are getting more and more popular, while their size and price are significantly reduced, thanks to the advancement of semiconductor technologies.
FIG. 1 is a block diagram showing an architecture of a conventional computer system 100, in which a main processor 110, a chipset 120, a main memory 130, a peripheral device 140, and a read only memory (ROM) 150 for storing booting programs for the computer system 100, are depicted. Note that the main processor 110 includes a central processing unit (CPU) and CPU-related circuits. The chipset 120 is used to integrate control circuits in the computer system 100. The main processor 110 accesses the main memory 130 and communicates with the peripheral device 140 with the aid of the chipset 120 within the computer system 100. The main memory 130 includes memories and their related control circuits. The main memory 130, typically dynamic random access memory (DRAM) because of its higher capacity and lower price, is used to store programs and data used by the main processor 110. The peripheral device 140 includes various peripheral devices which can be connected to the computer system 100, such as hard disk drives (HDD), floppy disk drives (FDD), devices connected to a RS232 interface, and printers, etc.
The ROM 150 not only stores the booting programs, but also programs of the basic input output systems (BIOS) for the computer system 100. When the computer system 100 is turned ON or reset, the main processor 110 will access the ROM 150 to boot the computer system 100. Over the past few years, the accessing speed of DRAMs has been significantly improved thanks to the advancement of semiconductor technologies. The enhancement of ROMs, however, is not so impressive. Therefore, there is a gap in accessing speed between the DRAMs and ROMs.
The BIOS programs stored in the ROM 150 within the computer system 100 need to be called frequently. Unfortunately, performance of the computer system 100 is generally deteriorated because of the low accessing speed of the ROM 150. Therefore, it has become a common practice to move the programs stored in the ROM 150 to the main memory 130 once the computer system 100 is booted. The programs in the main memory 130, instead of the ROM 150, will be called to increase the operating efficiency as long as the computer system 100 is in operation.
As shown in FIG. 1, where the computer system 100 accesses contents of the ROM 150 through an industrial standard adapter (ISA) interface 125, which is integrated within the chipset 120. In the early stage, personal computers used to access various peripheral devices only through the ISA interface 125. With more complete specifications for computer interface developed, such as a peripheral component interconnect (PCI), the ISA interface 125 has gradually become obsolete. In another aspect, although a chipset can be designed to provide more functions, it can not, however, provide enough pins to perform these functions due to the size constraint of the chipset itself. Especially, the less functional ISA interface occupies excessive pins from the chipset, which is against the trend for demanding a smaller size for an electronic component. Therefore, the computer industry is now considering to totally abandon the ISA interface. Instead, a new interface of low pin count (LPC), which only uses 8 pins, is proposed to replace the ISA interface. Although the LPC interface takes fewer pins from the chipset, it does cause a problem. That is, the ROMs for storing the BIOS programs to boot the computer system need to be redesigned accordingly if the LPC interface is used.
FIG. 2 is a block diagram showing an architecture of a conventional computer system using a LPC interface in a chipset to access a ROM. As shown in FIG. 2, when a computer system 200 is turned on, booting programs in a ROM 250 will be accessed and executed in a main processor 210. The contents of the ROM 250 will then be moved to a main memory 230 through a LPC interface 225 within a chipset 220. Therefore, the LPC interface 225 within the chipset 220 possesses the same functions as those of the ISA interface in FIG. 1.
Although the LPC interface 225 occupies less peripheral pins, it can not, however, connect to conventional ROMs, which are widely used so far. An interface circuit for ROMs needs to be designed to connect to the LPC interface 225 within the chipset 220. Unfortunately, ROMs with a LPC interface are not available now. If there is any, the cost at the initial stage will be very high due to production scale or technological problems.
As a summary, the conventional architecture for accessing a ROM in a computer system has the following disadvantages:
1. An ISA interface within a chipset is required to access the booting programs stored in a conventional ROM for a computer system. The ISA interface, however, occupies excessive peripheral pins from the chipset, preventing the chipset from providing more functions for the computer system. PA1 2. If a LPC interface built within a chipset is used to access a ROM, a LPC interface circuit for the ROM needs to be designed, which are not available so far. Even if the LPC interface for ROMs is available, the production cost of the "new" ROMs will be higher than that of the conventional ROMs, so that the products produced will not be very competitive in the market.